This thesis was done for Vacon Oy, which is a part of Danfoss's Drives segment. The aim of the thesis was to compare the new Vitis tool with those currently in use, Vivado and SDK, which are used to design FPGA circuits and software. The thesis would give an objective look into both design flows and could help to un-derstand their cost-effectiveness. The thesis was carried out by creating an LED brightness control program with both flows and they were compared to each other. The aim of the comparison was to bring up the size of both implementations, the power consumption, the ease of verification and the time spent. Information was sought in scientific articles, publications, and software and hardware manufacturer manuals and documentation. During the course of the thesis it was concluded that Vitis cannot be used to implement the specified functionality. Instead, the Vivado HLS tool was introduced as a new benchmark. The comparison revealed that both flows use nearly the equal amount of resources and power. The algorithm verification process is also easier using the HLS flow. However, the HLS implementation introduced a small delay between runs and therefore it should not be used in timing-critical applications. The traditional flow should not be entirely replaced with HLS, however it could be more suitable for intensive mathematical algorithms that do not require time-critical functionality.